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		<title>Ports in Interfaces</title>
		<link>http://www.svug.org/Forum/tabid/57/forumid/32/view/topics/Default.aspx</link>
		<description>9 original posts</description>
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			<title>Original Post: aravind</title>
			<description>&lt;DIV class=post&gt;
&lt;P&gt;Hi,&lt;BR&gt;I am trying to understand the use of ports for interfaces. Other than allow passing of an externally generated signal to the interface, is there any other use for it ?&lt;BR&gt;Typically, for a bus interface, I have seen the clock and reset getting used as ports of an interface and the rest of the signals are defined as part of the interface.&lt;/P&gt;
&lt;P&gt;Eg:&lt;BR&gt;interface ahb (input bit HCLK, HRESETn)&lt;BR&gt;logic HADDR;&lt;BR&gt;.&lt;BR&gt;.&lt;BR&gt;.&lt;BR&gt;endinterface : ahb&lt;/P&gt;
&lt;P&gt;The above allows HCLK and HRESETn to be generated at one top level instead of any arbitary place in the testbench. The question is, Section 20.3 in IEEE 1800 tries to elaborate on use of [prts in interrfaces but I dont seem to understand the point.&lt;BR&gt;I appreciate any response in this regard. &lt;/P&gt;
&lt;P&gt;Thanks&lt;BR&gt;-- Aravind &lt;/P&gt;&lt;/DIV&gt;</description>
			<link>http://www.svug.org/Forum/tabid/57/forumid/32/postid/81/view/topic/Default.aspx</link>
			<author>forum admin</author>
			<pubDate>Fri, 27 Apr 2007 17:55:37 GMT</pubDate>
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