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Subject: Sequence when signal is active
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MikeUser is Offline

Posts:1

11/18/2008 5:49 PM  
Does anyone know how to create a sequence that is only active when a signal is a logic 1 value?

Here's the signal "A"'s sequence of values, it can be active for a random number of cycles.
0 0 0 1 1 1 1 0 0 0 0

In this case, I only want the sequence to be active for 4 cycles.

This is what I've tried but the sequence is active for one cycle to long.

sequence
  (AΎ*:$] ##1 !A);
endsequence

Thanks for your help on this.

Mike
TimUser is Offline

Posts:1

11/19/2008 11:05 AM  
I simulated with the following code:
sequence S1; @(posedge clk)
(A[*1:$] ##1 !A);
endsequence

When A is high on a posedge clk, the sequence goes active and stays active until A is low on a posedge clk. If you change A at the same time as clk, then you might see the sequence being active skewed by one clock because of the sampling nature of assertions.


However, I did the sequence active for the correct number of cycles.




Tim
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