RegisterLogin  
Update Profile
   
You are here: Forum  
Minimize 
SVUG Community Forum
Subject: Original Post: cliffc
Prev Next
You are not authorized to post a reply.

Author Messages
forumUser is Offline

Posts:0

04/27/2007 5:05 PM  

Hi, all -

I will post this to both www.verificationguild.org and www.svug.org to see what responses I get.

Does anybody know where the term "scoreboard" came from? A Google search for "software scoreboard" gets me all types of hits related to software for tracking sports games, etc. (not too helpful).

From Janick's VMM-pg. 39 - "The term "scoreboard" is not well-defined in the industry. It sometimes refers to the storage data structure only, sometimes it includes the transfer function as well, and sometimes it includes the comparison function."

A the bottom of the same page and top of page 40, is a description for "Reference Model" and some differentiation, "Reference models have the same capabilities and challenges as scoreboards. Unlike a scoreboard, the comparison function works directly from the output of the reference model."

But I frequently find text referring to the Reference Model in the Scoreboard. A Google search of "verilog scoreboard" first went to my paper on Verilog-2001 Scoreboard of features implemented by vendors (not related to testbench scoreboards at all), but near the top of the list was this:

EETimes.com - Verifying an ARM Core
"As we mentioned, the scoreboard is the module in testbench where the validity of any activity in Verilog model is checked. Activities predicted by the reference model are added to a list of expected transactions in the scoreboard."

So ARM threw the reference model into the scoreboard. Two of the VMM co-authors were ARM engineers.

So who coined the phrase "scoreboard" and what were they thinking when they did?

I originally thought scoreboard referred to the pass-fail score generated by testbenches (how many vectors ran, how many passed, and how many failed - keep score!)

Also, the VMM uses the term "Data Structure," which just seems to be a concise name for "Expected Data FIFO."

Thoughts? We keep throwing these terms around loosely and our inability to agree on precise definitions leads to confusion, especially among new users.

Regards - Cliff Cummings
----------------------------------------------------
Cliff Cummings - Sunburst Design, Inc.
cliffc@sunburst-design.com
www.sunburst-design.com
World Class Verilog & SystemVerilog Training

forumUser is Offline

Posts:0

04/27/2007 5:05 PM  

Hi Cliff,

I believe the term "scoreboard" for verification comes from the fault tolerant hardware domain. A scoreboard register stores the results from two or more redundant data paths that may or may not arrive at the same time and passes on a single "verified" result. The CDC 6600 is generally accepted as the first supercomputer (1964) and used this technique and terminology.

If you do a search for "VHDL scoreboard", you will find some papers around 1991 that mention using a scoreboard in your testbench.

I believe that the folks at InSpec (a.k.a. Verisity) are really the ones responsible for popularizing the term around 1996 as another name for a checker which might also include a database.

Dave

forumUser is Offline

Posts:0

04/27/2007 5:06 PM  

(Posting done at vguild, just copied and pasted)

I face several Specman users here locally and most of them use it as if it is synonymous to "checker" which I humbly disagree with. In my course on "Comprehensive Functional Verification" I define it more like in Ben's post.

It will be great if the following book addressed it:

Taxonomies for the Development And Verification of Digital Systems
Author(s): Bailey, Brian; Martin, Grant; Anderson, Thomas

I believe Brian used to be around in this forum, if he can shed some light that will be useful. I though this specific book is supposed to take care of it for the community Smile

Cheers
Ajeetha, CVC
www.noveldv.com
_________________
Ajeetha Kumari,
Contemporary Verification Consultants Pvt Ltd. http://www.noveldv.com
* A Pragmatic Approach to VMM Adoption http://www.systemverilog.us/
* SystemVerilog Assertions Handbook
* Using PSL/Sugar

You are not authorized to post a reply.



ActiveForums 3.7
  

 Copyright 2008 by SystemVerilog User Group Contact Us    Privacy Statement