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Subject: Syntax Help
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PradeepUser is Offline

Posts:2
04/13/2010 12:53 PM  
Hi All,

I am new to using system verilog and would like to know the behavior of the below code.

for (int i=0; i < 32; i++)
    data[i*16+:16] = 16'hFFFF;

What exactly i*16+ mean?

Thanks for your time..
KeithUser is Offline

Posts:6
04/13/2010 2:08 PM  
Hello

What it means is that data will be referenced from the starting bit position i*16 up to bit position (i*16) + 16 - 1.
The format for this vector bit part select is [start_pos +: width] which means it references from the start_pos up to the start_pos + width - 1;
If you use the -: then it references the other way of start_pos down to the start_pos - width + 1;

data must be the size of (0:(32*16) - 1)

for i = 0 dataΎ:15] is referenced
for i = 1 data⎜:31] is referenced
for i = 2 data⎬:47] is referenced
for i = 3 data⎼:63] is referenced

For reference check out this doc:
http://www.sutherland-hdl.com/online_verilog_ref_guide/verilog_2001_ref_guide.pdf
Check section 6.4

KeithUser is Offline

Posts:6
04/13/2010 2:10 PM  
Sorry the formatting got screwed up:

data must be the size ( 0 : ( 32 * 16 ) - 1)

for i = 0 data [ 0 : 15] is referenced
for i = 1 data [ 0 : 31] is referenced
for i = 2 data [ 0 : 47] is referenced
for i = 3 data [ 0 : 63] is referenced

hopefully this works
KeithUser is Offline

Posts:6
04/13/2010 2:10 PM  
Sorry messed up again

for i = 0 data [ 0 : 15] is referenced
for i = 1 data [ 16 : 31] is referenced
for i = 2 data [ 32 : 47] is referenced
for i = 3 data [ 48 : 63] is referenced
PradeepUser is Offline

Posts:2
04/13/2010 3:14 PM  

Hi Keith,

Thanks a lot for your explanation..
You are not authorized to post a reply.
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