Hi all,

Does anyone know how to make the checkpoint in covergroup consistent with
its constraint automatically?
I try to use "bins" but it looks stupid, and if I have a 16bits or
32 bits data, or more complicated constraint, it is not going to work..

Because the coverage report will always has it's expected value 8 for rdata
, in fact, due to the constraint, I need the expected value to be 4 to get 100% coverage.....

Ex:
class Data;
rand logic ΐ:0] rdata;
covergroup Covgrp
checkpoint rdata {
bins even_rdata = {Ύ,2,4,6]} -> any better way to get around?
}
endgroup

constraint c_rdata {
rdata %2 == 0;
}
endclass

Thanks,
I-Tao

Hi I-Tao,

Consider using the expression "rdata % 2" (or the equivalent rdataΎ]) itself as the sampling expression:

covergroup Covgrp;
rdata_even_or_odd : coverpoint (rdata % 2) {
bins even = { 0 };
bins odd = { 1 };
}
endgroup

or if you're really only interested in establishing that you got even rdata add a conditional "iff (rdata % 2) == 0" and/or ignore the "odd" bins by removing it or replacing it with a default bin.

Also, since your coverage group is inside a class (i.e. it is an embedded coverage group), you can readily "pre-process" rdata using auxiliary properties/variables as needed, something like

class Data;
...
logic even_flag;

covergroup Covgrp_2;
coverpoint even_flag;
endgroup

function new(...);
Covgrp_2 = new;
endfunction

function void cover_it(...);
this.even_flag = this.rdataΎ]
...
Covgrp_2.sample();
endfunction

endclass

The "cover_it" function is now your specialized sampling control.

This may all seem like overkill for your very small example, but it offers the following general advantages:

- It facilitates separation of DUT-specific coverage model from transactor models
- It leverages the full OOP framework to bring together pertinent data and events
- It makes it easier to match the data sampling interface to verification environment
- It allows simple and unobtrusive coverage integration

Regards,
Hans

Hi Hans,
Thanks for your reply, but I still have some doubts.
Based on the example, the constraint is : rdata %2 ==0;
which means all the possible values are : 0,2,4,6
I wanna to know if all the 4 values are generated by the simulation, so I expected
to see the report is somewhat like this:

Variable Expected Covered Percent Goal Weight
rdata 4 2 50% ... ....

If you put checkpoint to (rdata%2), it will only check the bit: rdataΎ],
As long as the rdata hits 0, and 1 , the coverage will be 100% and which is not what I want.

In fact, what I need the most is a way to let covergroup knows about what's in the constraint and calculates all the possibility automatically. Therefore I don't
need to spend time fixing my covergroup to be consistent with the constraint,
it will be a bug-prone process..

I hope I am making myself clear, or is there something I missed??

Thanks again.
I-Tao

Hello again,
AFAIK, there is no construct within the language itself to "generate" coverage groups or coverage points automatically from corresponding constraints. You'd have to use other means to accomplish something like that, e.g. using scripts that parse your code looking for constraints that are to be mapped to coverage points.

Concerning your other matter, I wasn't clear exactly on your coverage objective. From your initial example I gathered that you just wanted to know even vs. odd. If you want to capture the actual even values that have been sampled, in a scalable way, explore the following options. Note that these are merely suggestions, i.e. I have not tried them to see whether they give you exactly what you want. Also, for wider rdata (e.g. 8 bits or wider) you should ask yourself whether you are really interested in covering every single even value in the corresponding range. I doubt it.

covergroup Covgrp;
rdata_even_values : coverpoint (rdata) iff (rdata % 2 == 0) {
bins values[] = default;
}
endgroup

Problem with the above is that default bins are not included in coverage calculations, according to the LRM.

You could try the bin specification "bins values[] = {0 : $ }" instead, but now you have to find a way to discard the odd values. Using an ignore_bins here has scalability issues again. In Vera, there used to be a sort of "step" operator that can be used to specify incremental but non-contiguous ranges. This operator is not available in SystemVerilog.

Another possible solution, using automatic bin creation (please consult the LRM for details):

covergroup Covgrp;
rdata_even_values : coverpoint (rdata) iff (rdata % 2 == 0);
option.auto_bin_max =
endgroup

I believe though that the bins are pre-created and hence the problem would again be the inclusion of odd value bins.

Lastly, as mentioned, likely you are not interested in all even values of a large range. Consider then something like

covergroup Covgrp;
even_rdata_min : coverpoint (rdata == 0);
even_rdata_max : coverpoint (rdata == 2**$bits(rdata)-2);
even_rdata_almost_min : coverpoint (rdata == 2);
even_rdata_almost_max : coverpoint (rdata == 2**$bits(rdata)-4);
even_rdata_others : coverpoint (rdata >= 4 and rdata <= 2**$bits(rdata)-6);
endgroup

I guess the point is that you may need to be "creative" with coverage implementation. All the more reason to leverage the full SV OOP framework by using designated coverage classes that contain coverage group instances.

Good luck,
Hans

Me again,
Further to the above, I just thought of something. Duh: just sample all rdata bits but the LSB and require that the bottom half of the range be covered:

covergroup Covgrp;
rdata_even_values : coverpoint (rdata >> 1) iff (rdata % 2 == 0) {
bins values[] = {0 : $};
// or bins values[] = {0 : 2**($bits(rdata)-1)-1}
}
endgroup

Hans