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04/27/2007 5:55 PM  

Hi,
I am trying to understand the use of ports for interfaces. Other than allow passing of an externally generated signal to the interface, is there any other use for it ?
Typically, for a bus interface, I have seen the clock and reset getting used as ports of an interface and the rest of the signals are defined as part of the interface.

Eg:
interface ahb (input bit HCLK, HRESETn)
logic HADDR;
.
.
.
endinterface : ahb

The above allows HCLK and HRESETn to be generated at one top level instead of any arbitary place in the testbench. The question is, Section 20.3 in IEEE 1800 tries to elaborate on use of [prts in interrfaces but I dont seem to understand the point.
I appreciate any response in this regard.

Thanks
-- Aravind

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04/27/2007 5:56 PM  

Aravind,
What exactly is confusing to you? You said:

>> The question is, Section 20.3 in IEEE 1800 tries to elaborate on use of [prts in
>> interrfaces but I dont seem to understand the point.

Is there anything specific there that you don't understand? I just now re-read it, didn't find anything fancy. I think of interface as very similar to a module, except that interface can be passed as a "module_port_item". The IOs to an interface itself behaves very similar to a module AFAIK.

Regards
Ajeetha, CVC
www.noveldv.com

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04/27/2007 5:56 PM  

Your question, "is there any other use for interfaces other than allow passing of an externally generated signal to the interface" is a good one.

On the one hand, if you don't use ports on your interface, then you can still connect things across interfaces with cross module references (XMRs). However, what's crucial here is that XMRs are not supported in design for synthesis. So ports on interfaces are a must then for RTL design.

Does this clarify things?

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04/27/2007 5:56 PM  

The key reason for ports on interfaces is to share signals among other interface instances, whether they are from the same or different interface definitions. Signals declared local to a interface create a instance of that signal for each instance of the interface. Most ports on interfaces are either inputs or inouts, which means they are a connection to a signal instantiated elsewhere.

Dave

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04/27/2007 5:56 PM  

Referring to "hvdschoot", its hard to see why an interface (without ports) simply connected to 2 or more modules (by being included in the module's ports) cannot be supported by synthesis.

It seems like a logical relationship and seems semantically possible (e.g. a master and slave module interacting with a certain handshaking protocol defined by an interface)

Are you sure about what you said?

Can anyone else comment/confirm?

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04/27/2007 5:57 PM  

Hello Obajaj,
I think you misinterpreted what I said. What I meant was that if you don't use interface ports to share signals among interfaces (and modules), you are left with XMRs to accomplish the interconnections (i.e. the "sharing"). Take for instance your ahb interface:

interface ahb_if (input bit HCLK, HRESETn)
...
endinterface : ahb

One can create multiple instances of it all sharing the same clock and reset signal, upon declaration:

logic clk, resetn;

ahb_if ahb_1(clk, resetn);
ahb_if ahb_2(clk, resetn);
...

some_other_if other(clk, ...)

Without using interface ports, but using local signals instead, AFAIK one would have to use XMRs in continuous assignments like:

assign ahb_1.clk = clk;
assign ahb_1.resetn = resetn;

Hans

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04/27/2007 5:57 PM  

Hi hvschoot,

Sorry I got confused because you used the word "synthesis". So, I guess synthesis wouldn't complain about XMRs and internal interface signals, then, right?

Also, you mentioned that you have to use assign statements to connect all interface instance signals to each other (and the top level). In my opinion thats not true,..... You could also achieve the same result by instantiating the interface only once, but using the same instance of that interface within all modules that use those signals,....

i.e.

interface ahb_if();
bit HCLK;
bit HRESETn;
...
endinterface : ahb

module ahb_master(ahb_if bus);
...
endmodule : ahb_master

module ahb_slave(ahb_if bus);
...
endmodule : ahb_slave

module top();
ahb_if ahb_bus();
ahb_master master1(ahb_bus bus);
ahb_slave slave1(ahb_bus bus);
...
endmodule : top

The above should achieve the same result, shouldn't it?
Ofcourse if one wants to share signals between different interface instances of different interface definitions, then I guess one has to use interface ports.

Why should one instantiate a single interface definition more than once for applications like a bus, if the goal is simply to connect modules to each other using that interface/bus? (unless trying to model something like a multi clock domain design for an interface that is NOT a shared bus)

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04/27/2007 5:58 PM  

No, synthesis would complain about the cross module/interface references.

Back to your original question as to why interface ports are useful, as you observed in your last post, if one wants to share signals between different interface instances of different interface definitions, then it's appropriate to use interface ports. However, this can be true also for different interface instances of a single interface definition. This may not be so obvious in your AHB example as you probably think of a single AHB bus only, but simply consider a different type of device, say for instance with multiple Ethernet ports. One would have a single Ethernet interface definition and multiple instances of it, one per port. All these ports may still share some signals, such as a system clock and reset.

All that to say that interface ports are useful in the same way as module ports are useful.

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04/27/2007 5:58 PM  

Aahh yes, thats (multiple ethernet ports) a good example of using multiple instances of the same interface definition (and still needing to use interface ports for connecting signals).

Thanks.

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04/30/2007 3:27 PM  
Does anyone know if its possible to instantiate an interface with a "floating" port?
In other words, if a person does not want to externally connect/share/hardwire one of the interface ports, can it be left floating?

I ask this, because its a reuse issue. If the above is NOT possible, then one would need to define interfaces as having signals that either have to be shared, or cannot be shared (internal signals). If one wants to change from one to the other, then you would need to "redefine" the interface. Is that correct?
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